# compile vhdl design source files
vhdl work  \
"../../../../dat096_ref_design.srcs/sources_1/imports/grlib-gpl-2019.4-b4246/designs/leon3-xilinx-ac701/clk_div.vhd" \
"../../../../dat096_ref_design.srcs/sources_1/imports/grlib-gpl-2019.4-b4246/designs/leon3-xilinx-ac701/hp_filter.vhd" \

vhdl xil_defaultlib  \
"../../../../dat096_ref_design.srcs/sources_1/imports/vhdlcode/time_mux.vhdl" \

vhdl work  \
"../../../../dat096_ref_design.srcs/sources_1/new/demux_16.vhd" \
"../../../../dat096_ref_design.srcs/sources_1/new/demux16_sync.vhd" \
"../../../../dat096_ref_design.srcs/sources_1/new/scan.vhd" \
"../../../../dat096_ref_design.srcs/sources_1/new/energy_compare.vhd" \

vhdl xil_defaultlib  \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_cic_compiler_0_0/sim/pdm_to_pcm_cic_compiler_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_fir_compiler_0_0/sim/pdm_to_pcm_fir_compiler_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_fir_compiler_1_0/sim/pdm_to_pcm_fir_compiler_1_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_clk_div_0_0/sim/pdm_to_pcm_clk_div_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_util_ds_buf_0_0/util_ds_buf.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_util_ds_buf_0_0/sim/pdm_to_pcm_util_ds_buf_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_clk_div_1_0/sim/pdm_to_pcm_clk_div_1_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_hp_filter_0_0/sim/pdm_to_pcm_hp_filter_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_timemux_0_2/sim/pdm_to_pcm_timemux_0_2.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_demux16_sync_0_0/sim/pdm_to_pcm_demux16_sync_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_addsub_0_0/sim/pdm_to_pcm_c_addsub_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_addsub_0_1/sim/pdm_to_pcm_c_addsub_0_1.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_addsub_1_0/sim/pdm_to_pcm_c_addsub_1_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_shift_ram_0_0/sim/pdm_to_pcm_c_shift_ram_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_shift_ram_1_0/sim/pdm_to_pcm_c_shift_ram_1_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_shift_ram_1_1/sim/pdm_to_pcm_c_shift_ram_1_1.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_c_shift_ram_1_2/sim/pdm_to_pcm_c_shift_ram_1_2.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_scan_0_0/sim/pdm_to_pcm_scan_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_energy_compare_0_0/sim/pdm_to_pcm_energy_compare_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/ip/pdm_to_pcm_mult_gen_0_0/sim/pdm_to_pcm_mult_gen_0_0.vhd" \
"../../../../dat096_ref_design.ip_user_files/bd/pdm_to_pcm/sim/pdm_to_pcm.vhd" \
"../../../../dat096_ref_design.srcs/sim_2/imports/dat096_ref_design/test_pdm_to_pcm.vhd" \

# Do not sort compile order
nosort
