SET_FLAG MODE BATCH
SET_FLAG STANDALONE_MODE TRUE
SET_PREFERENCE ipi_mode no
SET_PREFERENCE is_ip_locked false
SET_PREFERENCE devicefamily artix7
SET_PREFERENCE device xc7a200t
SET_PREFERENCE speedgrade -2
SET_PREFERENCE package fbg676
SET_PREFERENCE verilogsim false
SET_PREFERENCE vhdlsim true
SET_PREFERENCE designentry VHDL
SET_PREFERENCE outputdirectory d:/sound_location_project/vivado/dat096-master-latest_version/latest_version/dat096_ref_design.srcs/sources_1/ip/mig/_tmp/
SET_PREFERENCE subworkingdirectory d:/sound_location_project/vivado/dat096-master-latest_version/latest_version/dat096_ref_design.srcs/sources_1/ip/mig/_tmp/
SET_PREFERENCE flowvendor Other
SET_PREFERENCE tool vivado
SET_PREFERENCE compnamestatus 0
SET_PARAMETER component_name mig
SET_PARAMETER xml_input_file D:/sound_location_project/vivado/dat096-master-latest_version/latest_version/dat096_ref_design.srcs/sources_1/ip/mig/mig.prj
SET_PARAMETER data_dir_path c:/xilinx/Vivado/2019.1/data/ip/xilinx/mig_7series_v4_2
SET_CORE_NAME Memory Interface Generator (MIG 7 Series)
SET_CORE_VERSION 4.2
SET_CORE_VLNV xilinx.com:ip:mig_7series:4.2
SET_CORE_PATH c:/xilinx/Vivado/2019.1/data/ip/xilinx/mig_7series_v4_2
SET_CORE_DATASHEET c:/xilinx/Vivado/2019.1/data/ip/xilinx/mig_7series_v4_2/data/docs/ds176_7series_MIS.pdf
