// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2019.1 (win64) Build 2552052 Fri May 24 14:49:42 MDT 2019
// Date        : Mon May 25 21:23:31 2020
// Host        : LAPTOP-RJQ3H7G3 running 64-bit major release  (build 9200)
// Command     : write_verilog -force -mode funcsim
//               D:/sound_location_project/energy/dat096-master-latest_version/latest_version/dat096_ref_design.srcs/sources_1/bd/pdm_to_pcm/ip/pdm_to_pcm_fir_compiler_0_0/pdm_to_pcm_fir_compiler_0_0_sim_netlist.v
// Design      : pdm_to_pcm_fir_compiler_0_0
// Purpose     : This verilog netlist is a functional simulation representation of the design and should not be modified
//               or synthesized. This netlist cannot be used for SDF annotated simulation.
// Device      : xc7a200tfbg676-2
// --------------------------------------------------------------------------------
`timescale 1 ps / 1 ps

(* CHECK_LICENSE_TYPE = "pdm_to_pcm_fir_compiler_0_0,fir_compiler_v7_2_12,{}" *) (* downgradeipidentifiedwarnings = "yes" *) (* x_core_info = "fir_compiler_v7_2_12,Vivado 2019.1" *) 
(* NotValidForBitStream *)
module pdm_to_pcm_fir_compiler_0_0
   (aclk,
    s_axis_data_tvalid,
    s_axis_data_tready,
    s_axis_data_tlast,
    s_axis_data_tdata,
    m_axis_data_tvalid,
    m_axis_data_tready,
    m_axis_data_tlast,
    m_axis_data_tdata);
  (* x_interface_info = "xilinx.com:signal:clock:1.0 aclk_intf CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME aclk_intf, ASSOCIATED_BUSIF S_AXIS_CONFIG:M_AXIS_DATA:S_AXIS_DATA:S_AXIS_RELOAD, ASSOCIATED_RESET aresetn, ASSOCIATED_CLKEN aclken, FREQ_HZ 18431963, PHASE 0.0, CLK_DOMAIN /clk_wiz_0_clk_out1, INSERT_VIP 0" *) input aclk;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS_DATA TVALID" *) (* x_interface_parameter = "XIL_INTERFACENAME S_AXIS_DATA, TDATA_NUM_BYTES 3, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 0, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 0, HAS_TLAST 1, FREQ_HZ 18431963, PHASE 0.0, CLK_DOMAIN /clk_wiz_0_clk_out1, LAYERED_METADATA undef, INSERT_VIP 0" *) input s_axis_data_tvalid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS_DATA TREADY" *) output s_axis_data_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS_DATA TLAST" *) input s_axis_data_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 S_AXIS_DATA TDATA" *) input [23:0]s_axis_data_tdata;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS_DATA TVALID" *) (* x_interface_parameter = "XIL_INTERFACENAME M_AXIS_DATA, TDATA_NUM_BYTES 3, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 0, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 0, HAS_TLAST 1, FREQ_HZ 18431963, PHASE 0.0, CLK_DOMAIN /clk_wiz_0_clk_out1, LAYERED_METADATA xilinx.com:interface:datatypes:1.0 {TDATA {datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type automatic dependency {} format long minimum {} maximum {}} value 94} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0} array_type {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value chan} size {attribs {resolve_type generated dependency chan_size format long minimum {} maximum {}} value 4} stride {attribs {resolve_type generated dependency chan_stride format long minimum {} maximum {}} value 24} datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type automatic dependency {} format long minimum {} maximum {}} value 22} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0} array_type {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value path} size {attribs {resolve_type generated dependency path_size format long minimum {} maximum {}} value 1} stride {attribs {resolve_type generated dependency path_stride format long minimum {} maximum {}} value 24} datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type generated dependency out_width format long minimum {} maximum {}} value 22} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0} real {fixed {fractwidth {attribs {resolve_type generated dependency out_fractwidth format long minimum {} maximum {}} value 0} signed {attribs {resolve_type generated dependency out_signed format bool minimum {} maximum {}} value true}}}}}}}}} TDATA_WIDTH 24 TUSER {datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type automatic dependency {} format long minimum {} maximum {}} value 0} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0} struct {field_data_valid {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value data_valid} enabled {attribs {resolve_type generated dependency data_valid_enabled format bool minimum {} maximum {}} value false} datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type generated dependency data_valid_bitwidth format long minimum {} maximum {}} value 0} bitoffset {attribs {resolve_type immediate dependency {} format long minimum {} maximum {}} value 0}}} field_chanid {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value chanid} enabled {attribs {resolve_type generated dependency chanid_enabled format bool minimum {} maximum {}} value false} datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type generated dependency chanid_bitwidth format long minimum {} maximum {}} value 0} bitoffset {attribs {resolve_type generated dependency chanid_bitoffset format long minimum {} maximum {}} value 0} integer {signed {attribs {resolve_type immediate dependency {} format bool minimum {} maximum {}} value false}}}} field_user {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value user} enabled {attribs {resolve_type generated dependency user_enabled format bool minimum {} maximum {}} value false} datatype {name {attribs {resolve_type immediate dependency {} format string minimum {} maximum {}} value {}} bitwidth {attribs {resolve_type generated dependency user_bitwidth format long minimum {} maximum {}} value 0} bitoffset {attribs {resolve_type generated dependency user_bitoffset format long minimum {} maximum {}} value 0}}}}}} TUSER_WIDTH 0}, INSERT_VIP 0" *) output m_axis_data_tvalid;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS_DATA TREADY" *) input m_axis_data_tready;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS_DATA TLAST" *) output m_axis_data_tlast;
  (* x_interface_info = "xilinx.com:interface:axis:1.0 M_AXIS_DATA TDATA" *) output [23:0]m_axis_data_tdata;

  wire aclk;
  wire [23:0]m_axis_data_tdata;
  wire m_axis_data_tlast;
  wire m_axis_data_tready;
  wire m_axis_data_tvalid;
  wire [23:0]s_axis_data_tdata;
  wire s_axis_data_tlast;
  wire s_axis_data_tready;
  wire s_axis_data_tvalid;
  wire NLW_U0_event_s_config_tlast_missing_UNCONNECTED;
  wire NLW_U0_event_s_config_tlast_unexpected_UNCONNECTED;
  wire NLW_U0_event_s_data_chanid_incorrect_UNCONNECTED;
  wire NLW_U0_event_s_data_tlast_missing_UNCONNECTED;
  wire NLW_U0_event_s_data_tlast_unexpected_UNCONNECTED;
  wire NLW_U0_event_s_reload_tlast_missing_UNCONNECTED;
  wire NLW_U0_event_s_reload_tlast_unexpected_UNCONNECTED;
  wire NLW_U0_s_axis_config_tready_UNCONNECTED;
  wire NLW_U0_s_axis_reload_tready_UNCONNECTED;
  wire [0:0]NLW_U0_m_axis_data_tuser_UNCONNECTED;

  (* C_ACCUM_OP_PATH_WIDTHS = "38" *) 
  (* C_ACCUM_PATH_WIDTHS = "38" *) 
  (* C_CHANNEL_PATTERN = "fixed" *) 
  (* C_COEF_FILE = "pdm_to_pcm_fir_compiler_0_0.mif" *) 
  (* C_COEF_FILE_LINES = "5" *) 
  (* C_COEF_MEMTYPE = "2" *) 
  (* C_COEF_MEM_PACKING = "0" *) 
  (* C_COEF_PATH_SIGN = "0" *) 
  (* C_COEF_PATH_SRC = "0" *) 
  (* C_COEF_PATH_WIDTHS = "16" *) 
  (* C_COEF_RELOAD = "0" *) 
  (* C_COEF_WIDTH = "16" *) 
  (* C_COL_CONFIG = "1" *) 
  (* C_COL_MODE = "1" *) 
  (* C_COL_PIPE_LEN = "4" *) 
  (* C_COMPONENT_NAME = "pdm_to_pcm_fir_compiler_0_0" *) 
  (* C_CONFIG_PACKET_SIZE = "0" *) 
  (* C_CONFIG_SYNC_MODE = "0" *) 
  (* C_CONFIG_TDATA_WIDTH = "1" *) 
  (* C_DATAPATH_MEMTYPE = "2" *) 
  (* C_DATA_HAS_TLAST = "2" *) 
  (* C_DATA_IP_PATH_WIDTHS = "22" *) 
  (* C_DATA_MEMTYPE = "0" *) 
  (* C_DATA_MEM_PACKING = "0" *) 
  (* C_DATA_PATH_PSAMP_SRC = "0" *) 
  (* C_DATA_PATH_SIGN = "0" *) 
  (* C_DATA_PATH_SRC = "0" *) 
  (* C_DATA_PATH_WIDTHS = "22" *) 
  (* C_DATA_PX_PATH_WIDTHS = "22" *) 
  (* C_DATA_WIDTH = "22" *) 
  (* C_DECIM_RATE = "2" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_EXT_MULT_CNFG = "none" *) 
  (* C_FILTER_TYPE = "7" *) 
  (* C_FILTS_PACKED = "0" *) 
  (* C_HAS_ACLKEN = "0" *) 
  (* C_HAS_ARESETn = "0" *) 
  (* C_HAS_CONFIG_CHANNEL = "0" *) 
  (* C_INPUT_RATE = "16" *) 
  (* C_INTERP_RATE = "1" *) 
  (* C_IPBUFF_MEMTYPE = "2" *) 
  (* C_LATENCY = "15" *) 
  (* C_MEM_ARRANGEMENT = "1" *) 
  (* C_M_DATA_HAS_TREADY = "1" *) 
  (* C_M_DATA_HAS_TUSER = "0" *) 
  (* C_M_DATA_TDATA_WIDTH = "24" *) 
  (* C_M_DATA_TUSER_WIDTH = "1" *) 
  (* C_NUM_CHANNELS = "4" *) 
  (* C_NUM_FILTS = "1" *) 
  (* C_NUM_MADDS = "1" *) 
  (* C_NUM_RELOAD_SLOTS = "1" *) 
  (* C_NUM_TAPS = "15" *) 
  (* C_OPBUFF_MEMTYPE = "0" *) 
  (* C_OPTIMIZATION = "0" *) 
  (* C_OPT_MADDS = "none" *) 
  (* C_OP_PATH_PSAMP_SRC = "0" *) 
  (* C_OUTPUT_PATH_WIDTHS = "22" *) 
  (* C_OUTPUT_RATE = "32" *) 
  (* C_OUTPUT_WIDTH = "22" *) 
  (* C_OVERSAMPLING_RATE = "5" *) 
  (* C_PX_PATH_SRC = "0" *) 
  (* C_RELOAD_TDATA_WIDTH = "1" *) 
  (* C_ROUND_MODE = "1" *) 
  (* C_SYMMETRY = "1" *) 
  (* C_S_DATA_HAS_FIFO = "1" *) 
  (* C_S_DATA_HAS_TUSER = "0" *) 
  (* C_S_DATA_TDATA_WIDTH = "24" *) 
  (* C_S_DATA_TUSER_WIDTH = "1" *) 
  (* C_XDEVICEFAMILY = "artix7" *) 
  (* C_ZERO_PACKING_FACTOR = "1" *) 
  (* downgradeipidentifiedwarnings = "yes" *) 
  pdm_to_pcm_fir_compiler_0_0_fir_compiler_v7_2_12 U0
       (.aclk(aclk),
        .aclken(1'b1),
        .aresetn(1'b1),
        .event_s_config_tlast_missing(NLW_U0_event_s_config_tlast_missing_UNCONNECTED),
        .event_s_config_tlast_unexpected(NLW_U0_event_s_config_tlast_unexpected_UNCONNECTED),
        .event_s_data_chanid_incorrect(NLW_U0_event_s_data_chanid_incorrect_UNCONNECTED),
        .event_s_data_tlast_missing(NLW_U0_event_s_data_tlast_missing_UNCONNECTED),
        .event_s_data_tlast_unexpected(NLW_U0_event_s_data_tlast_unexpected_UNCONNECTED),
        .event_s_reload_tlast_missing(NLW_U0_event_s_reload_tlast_missing_UNCONNECTED),
        .event_s_reload_tlast_unexpected(NLW_U0_event_s_reload_tlast_unexpected_UNCONNECTED),
        .m_axis_data_tdata(m_axis_data_tdata),
        .m_axis_data_tlast(m_axis_data_tlast),
        .m_axis_data_tready(m_axis_data_tready),
        .m_axis_data_tuser(NLW_U0_m_axis_data_tuser_UNCONNECTED[0]),
        .m_axis_data_tvalid(m_axis_data_tvalid),
        .s_axis_config_tdata(1'b0),
        .s_axis_config_tlast(1'b0),
        .s_axis_config_tready(NLW_U0_s_axis_config_tready_UNCONNECTED),
        .s_axis_config_tvalid(1'b0),
        .s_axis_data_tdata(s_axis_data_tdata),
        .s_axis_data_tlast(s_axis_data_tlast),
        .s_axis_data_tready(s_axis_data_tready),
        .s_axis_data_tuser(1'b0),
        .s_axis_data_tvalid(s_axis_data_tvalid),
        .s_axis_reload_tdata(1'b0),
        .s_axis_reload_tlast(1'b0),
        .s_axis_reload_tready(NLW_U0_s_axis_reload_tready_UNCONNECTED),
        .s_axis_reload_tvalid(1'b0));
endmodule

(* C_ACCUM_OP_PATH_WIDTHS = "38" *) (* C_ACCUM_PATH_WIDTHS = "38" *) (* C_CHANNEL_PATTERN = "fixed" *) 
(* C_COEF_FILE = "pdm_to_pcm_fir_compiler_0_0.mif" *) (* C_COEF_FILE_LINES = "5" *) (* C_COEF_MEMTYPE = "2" *) 
(* C_COEF_MEM_PACKING = "0" *) (* C_COEF_PATH_SIGN = "0" *) (* C_COEF_PATH_SRC = "0" *) 
(* C_COEF_PATH_WIDTHS = "16" *) (* C_COEF_RELOAD = "0" *) (* C_COEF_WIDTH = "16" *) 
(* C_COL_CONFIG = "1" *) (* C_COL_MODE = "1" *) (* C_COL_PIPE_LEN = "4" *) 
(* C_COMPONENT_NAME = "pdm_to_pcm_fir_compiler_0_0" *) (* C_CONFIG_PACKET_SIZE = "0" *) (* C_CONFIG_SYNC_MODE = "0" *) 
(* C_CONFIG_TDATA_WIDTH = "1" *) (* C_DATAPATH_MEMTYPE = "2" *) (* C_DATA_HAS_TLAST = "2" *) 
(* C_DATA_IP_PATH_WIDTHS = "22" *) (* C_DATA_MEMTYPE = "0" *) (* C_DATA_MEM_PACKING = "0" *) 
(* C_DATA_PATH_PSAMP_SRC = "0" *) (* C_DATA_PATH_SIGN = "0" *) (* C_DATA_PATH_SRC = "0" *) 
(* C_DATA_PATH_WIDTHS = "22" *) (* C_DATA_PX_PATH_WIDTHS = "22" *) (* C_DATA_WIDTH = "22" *) 
(* C_DECIM_RATE = "2" *) (* C_ELABORATION_DIR = "./" *) (* C_EXT_MULT_CNFG = "none" *) 
(* C_FILTER_TYPE = "7" *) (* C_FILTS_PACKED = "0" *) (* C_HAS_ACLKEN = "0" *) 
(* C_HAS_ARESETn = "0" *) (* C_HAS_CONFIG_CHANNEL = "0" *) (* C_INPUT_RATE = "16" *) 
(* C_INTERP_RATE = "1" *) (* C_IPBUFF_MEMTYPE = "2" *) (* C_LATENCY = "15" *) 
(* C_MEM_ARRANGEMENT = "1" *) (* C_M_DATA_HAS_TREADY = "1" *) (* C_M_DATA_HAS_TUSER = "0" *) 
(* C_M_DATA_TDATA_WIDTH = "24" *) (* C_M_DATA_TUSER_WIDTH = "1" *) (* C_NUM_CHANNELS = "4" *) 
(* C_NUM_FILTS = "1" *) (* C_NUM_MADDS = "1" *) (* C_NUM_RELOAD_SLOTS = "1" *) 
(* C_NUM_TAPS = "15" *) (* C_OPBUFF_MEMTYPE = "0" *) (* C_OPTIMIZATION = "0" *) 
(* C_OPT_MADDS = "none" *) (* C_OP_PATH_PSAMP_SRC = "0" *) (* C_OUTPUT_PATH_WIDTHS = "22" *) 
(* C_OUTPUT_RATE = "32" *) (* C_OUTPUT_WIDTH = "22" *) (* C_OVERSAMPLING_RATE = "5" *) 
(* C_PX_PATH_SRC = "0" *) (* C_RELOAD_TDATA_WIDTH = "1" *) (* C_ROUND_MODE = "1" *) 
(* C_SYMMETRY = "1" *) (* C_S_DATA_HAS_FIFO = "1" *) (* C_S_DATA_HAS_TUSER = "0" *) 
(* C_S_DATA_TDATA_WIDTH = "24" *) (* C_S_DATA_TUSER_WIDTH = "1" *) (* C_XDEVICEFAMILY = "artix7" *) 
(* C_ZERO_PACKING_FACTOR = "1" *) (* ORIG_REF_NAME = "fir_compiler_v7_2_12" *) (* downgradeipidentifiedwarnings = "yes" *) 
module pdm_to_pcm_fir_compiler_0_0_fir_compiler_v7_2_12
   (aresetn,
    aclk,
    aclken,
    s_axis_data_tvalid,
    s_axis_data_tready,
    s_axis_data_tlast,
    s_axis_data_tuser,
    s_axis_data_tdata,
    s_axis_config_tvalid,
    s_axis_config_tready,
    s_axis_config_tlast,
    s_axis_config_tdata,
    s_axis_reload_tvalid,
    s_axis_reload_tready,
    s_axis_reload_tlast,
    s_axis_reload_tdata,
    m_axis_data_tvalid,
    m_axis_data_tready,
    m_axis_data_tlast,
    m_axis_data_tuser,
    m_axis_data_tdata,
    event_s_data_tlast_missing,
    event_s_data_tlast_unexpected,
    event_s_data_chanid_incorrect,
    event_s_config_tlast_missing,
    event_s_config_tlast_unexpected,
    event_s_reload_tlast_missing,
    event_s_reload_tlast_unexpected);
  input aresetn;
  input aclk;
  input aclken;
  input s_axis_data_tvalid;
  output s_axis_data_tready;
  input s_axis_data_tlast;
  input [0:0]s_axis_data_tuser;
  input [23:0]s_axis_data_tdata;
  input s_axis_config_tvalid;
  output s_axis_config_tready;
  input s_axis_config_tlast;
  input [0:0]s_axis_config_tdata;
  input s_axis_reload_tvalid;
  output s_axis_reload_tready;
  input s_axis_reload_tlast;
  input [0:0]s_axis_reload_tdata;
  output m_axis_data_tvalid;
  input m_axis_data_tready;
  output m_axis_data_tlast;
  output [0:0]m_axis_data_tuser;
  output [23:0]m_axis_data_tdata;
  output event_s_data_tlast_missing;
  output event_s_data_tlast_unexpected;
  output event_s_data_chanid_incorrect;
  output event_s_config_tlast_missing;
  output event_s_config_tlast_unexpected;
  output event_s_reload_tlast_missing;
  output event_s_reload_tlast_unexpected;

  wire \<const0> ;
  wire aclk;
  wire [21:0]\^m_axis_data_tdata ;
  wire m_axis_data_tlast;
  wire m_axis_data_tready;
  wire m_axis_data_tvalid;
  wire [23:0]s_axis_data_tdata;
  wire s_axis_data_tlast;
  wire s_axis_data_tready;
  wire s_axis_data_tvalid;
  wire NLW_i_synth_event_s_config_tlast_missing_UNCONNECTED;
  wire NLW_i_synth_event_s_config_tlast_unexpected_UNCONNECTED;
  wire NLW_i_synth_event_s_data_chanid_incorrect_UNCONNECTED;
  wire NLW_i_synth_event_s_data_tlast_missing_UNCONNECTED;
  wire NLW_i_synth_event_s_data_tlast_unexpected_UNCONNECTED;
  wire NLW_i_synth_event_s_reload_tlast_missing_UNCONNECTED;
  wire NLW_i_synth_event_s_reload_tlast_unexpected_UNCONNECTED;
  wire NLW_i_synth_s_axis_config_tready_UNCONNECTED;
  wire NLW_i_synth_s_axis_reload_tready_UNCONNECTED;
  wire [22:21]NLW_i_synth_m_axis_data_tdata_UNCONNECTED;
  wire [0:0]NLW_i_synth_m_axis_data_tuser_UNCONNECTED;

  assign event_s_config_tlast_missing = \<const0> ;
  assign event_s_config_tlast_unexpected = \<const0> ;
  assign event_s_data_chanid_incorrect = \<const0> ;
  assign event_s_data_tlast_missing = \<const0> ;
  assign event_s_data_tlast_unexpected = \<const0> ;
  assign event_s_reload_tlast_missing = \<const0> ;
  assign event_s_reload_tlast_unexpected = \<const0> ;
  assign m_axis_data_tdata[23] = \^m_axis_data_tdata [21];
  assign m_axis_data_tdata[22] = \^m_axis_data_tdata [21];
  assign m_axis_data_tdata[21:0] = \^m_axis_data_tdata [21:0];
  assign m_axis_data_tuser[0] = \<const0> ;
  assign s_axis_config_tready = \<const0> ;
  assign s_axis_reload_tready = \<const0> ;
  GND GND
       (.G(\<const0> ));
  (* C_ACCUM_OP_PATH_WIDTHS = "38" *) 
  (* C_ACCUM_PATH_WIDTHS = "38" *) 
  (* C_CHANNEL_PATTERN = "fixed" *) 
  (* C_COEF_FILE = "pdm_to_pcm_fir_compiler_0_0.mif" *) 
  (* C_COEF_FILE_LINES = "5" *) 
  (* C_COEF_MEMTYPE = "2" *) 
  (* C_COEF_MEM_PACKING = "0" *) 
  (* C_COEF_PATH_SIGN = "0" *) 
  (* C_COEF_PATH_SRC = "0" *) 
  (* C_COEF_PATH_WIDTHS = "16" *) 
  (* C_COEF_RELOAD = "0" *) 
  (* C_COEF_WIDTH = "16" *) 
  (* C_COL_CONFIG = "1" *) 
  (* C_COL_MODE = "1" *) 
  (* C_COL_PIPE_LEN = "4" *) 
  (* C_COMPONENT_NAME = "pdm_to_pcm_fir_compiler_0_0" *) 
  (* C_CONFIG_PACKET_SIZE = "0" *) 
  (* C_CONFIG_SYNC_MODE = "0" *) 
  (* C_CONFIG_TDATA_WIDTH = "1" *) 
  (* C_DATAPATH_MEMTYPE = "2" *) 
  (* C_DATA_HAS_TLAST = "2" *) 
  (* C_DATA_IP_PATH_WIDTHS = "22" *) 
  (* C_DATA_MEMTYPE = "0" *) 
  (* C_DATA_MEM_PACKING = "0" *) 
  (* C_DATA_PATH_PSAMP_SRC = "0" *) 
  (* C_DATA_PATH_SIGN = "0" *) 
  (* C_DATA_PATH_SRC = "0" *) 
  (* C_DATA_PATH_WIDTHS = "22" *) 
  (* C_DATA_PX_PATH_WIDTHS = "22" *) 
  (* C_DATA_WIDTH = "22" *) 
  (* C_DECIM_RATE = "2" *) 
  (* C_ELABORATION_DIR = "./" *) 
  (* C_EXT_MULT_CNFG = "none" *) 
  (* C_FILTER_TYPE = "7" *) 
  (* C_FILTS_PACKED = "0" *) 
  (* C_HAS_ACLKEN = "0" *) 
  (* C_HAS_ARESETn = "0" *) 
  (* C_HAS_CONFIG_CHANNEL = "0" *) 
  (* C_INPUT_RATE = "16" *) 
  (* C_INTERP_RATE = "1" *) 
  (* C_IPBUFF_MEMTYPE = "2" *) 
  (* C_LATENCY = "15" *) 
  (* C_MEM_ARRANGEMENT = "1" *) 
  (* C_M_DATA_HAS_TREADY = "1" *) 
  (* C_M_DATA_HAS_TUSER = "0" *) 
  (* C_M_DATA_TDATA_WIDTH = "24" *) 
  (* C_M_DATA_TUSER_WIDTH = "1" *) 
  (* C_NUM_CHANNELS = "4" *) 
  (* C_NUM_FILTS = "1" *) 
  (* C_NUM_MADDS = "1" *) 
  (* C_NUM_RELOAD_SLOTS = "1" *) 
  (* C_NUM_TAPS = "15" *) 
  (* C_OPBUFF_MEMTYPE = "0" *) 
  (* C_OPTIMIZATION = "0" *) 
  (* C_OPT_MADDS = "none" *) 
  (* C_OP_PATH_PSAMP_SRC = "0" *) 
  (* C_OUTPUT_PATH_WIDTHS = "22" *) 
  (* C_OUTPUT_RATE = "32" *) 
  (* C_OUTPUT_WIDTH = "22" *) 
  (* C_OVERSAMPLING_RATE = "5" *) 
  (* C_PX_PATH_SRC = "0" *) 
  (* C_RELOAD_TDATA_WIDTH = "1" *) 
  (* C_ROUND_MODE = "1" *) 
  (* C_SYMMETRY = "1" *) 
  (* C_S_DATA_HAS_FIFO = "1" *) 
  (* C_S_DATA_HAS_TUSER = "0" *) 
  (* C_S_DATA_TDATA_WIDTH = "24" *) 
  (* C_S_DATA_TUSER_WIDTH = "1" *) 
  (* C_XDEVICEFAMILY = "artix7" *) 
  (* C_ZERO_PACKING_FACTOR = "1" *) 
  (* downgradeipidentifiedwarnings = "yes" *) 
  pdm_to_pcm_fir_compiler_0_0_fir_compiler_v7_2_12_viv i_synth
       (.aclk(aclk),
        .aclken(1'b0),
        .aresetn(1'b0),
        .event_s_config_tlast_missing(NLW_i_synth_event_s_config_tlast_missing_UNCONNECTED),
        .event_s_config_tlast_unexpected(NLW_i_synth_event_s_config_tlast_unexpected_UNCONNECTED),
        .event_s_data_chanid_incorrect(NLW_i_synth_event_s_data_chanid_incorrect_UNCONNECTED),
        .event_s_data_tlast_missing(NLW_i_synth_event_s_data_tlast_missing_UNCONNECTED),
        .event_s_data_tlast_unexpected(NLW_i_synth_event_s_data_tlast_unexpected_UNCONNECTED),
        .event_s_reload_tlast_missing(NLW_i_synth_event_s_reload_tlast_missing_UNCONNECTED),
        .event_s_reload_tlast_unexpected(NLW_i_synth_event_s_reload_tlast_unexpected_UNCONNECTED),
        .m_axis_data_tdata({\^m_axis_data_tdata [21],NLW_i_synth_m_axis_data_tdata_UNCONNECTED[22:21],\^m_axis_data_tdata [20:0]}),
        .m_axis_data_tlast(m_axis_data_tlast),
        .m_axis_data_tready(m_axis_data_tready),
        .m_axis_data_tuser(NLW_i_synth_m_axis_data_tuser_UNCONNECTED[0]),
        .m_axis_data_tvalid(m_axis_data_tvalid),
        .s_axis_config_tdata(1'b0),
        .s_axis_config_tlast(1'b0),
        .s_axis_config_tready(NLW_i_synth_s_axis_config_tready_UNCONNECTED),
        .s_axis_config_tvalid(1'b0),
        .s_axis_data_tdata({1'b0,1'b0,s_axis_data_tdata[21:0]}),
        .s_axis_data_tlast(s_axis_data_tlast),
        .s_axis_data_tready(s_axis_data_tready),
        .s_axis_data_tuser(1'b0),
        .s_axis_data_tvalid(s_axis_data_tvalid),
        .s_axis_reload_tdata(1'b0),
        .s_axis_reload_tlast(1'b0),
        .s_axis_reload_tready(NLW_i_synth_s_axis_reload_tready_UNCONNECTED),
        .s_axis_reload_tvalid(1'b0));
endmodule
`pragma protect begin_protected
`pragma protect version = 1
`pragma protect encrypt_agent = "XILINX"
`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2019.1"
`pragma protect key_keyowner="Cadence Design Systems.", key_keyname="cds_rsa_key", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=64)
`pragma protect key_block
RR4Em7cJqtUtNi9JE6BBAO7Y1YvgkzfF4dddirgV0/8fBYkqltfH4FoNxQRojUxg32kjsawukRWb
nVGWu3vaRQ==

`pragma protect key_keyowner="Synopsys", key_keyname="SNPS-VCS-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
TnBCB0PQU+YenewcrSl/2XBL380INIl/ue7oqwY2oGTtEhQ2XmslqC0nzU9/riOdBzK5hsJ4uXY7
RGawx3vsxAZEIXh9bGLizTDLYYdyroJSp9X4uZ+QpMgEVCY5VOLhAwwrBI7zjjZwsLfKiRD4SExu
IC/p0qETnuhQt2DTKFY=

`pragma protect key_keyowner="Aldec", key_keyname="ALDEC15_001", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
LvGdRTOp28umymod4KZHE4jP0Es4beFMf/k3bm7tCmfXtDHjW0smQpt21ODVaJc79Tow9dCFciCg
sLDk88CEbrznYOGLcQtLGksUPepkoNQ7ydqeunJOx3gwi0u3i5npg3pO7mhUcWTJY2ZgmDNtA+4k
EF6EbJPjlH+CCyoDYs+Hvl7CnTxXdGS9dqMV+ESVahgDrLzRiiUdgX8gONApvevqhLJ74Ey88cVr
4WO2jQMlcxIq4YuF5DoRNVC1VwD5BHuxfU3xYQf1xhxL9PVIqUB/+yi8YUQxqy4VOfq8PZlsQV2z
Jdy8mC4nNqAZfNs2EBbVWKcqxJdw6bf4flXmPA==

`pragma protect key_keyowner="ATRENTA", key_keyname="ATR-SG-2015-RSA-3", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
soRdzDRC/FqWVHnQM3u0hyhATnY6NGkvga+C+ogP+oYX0yiDp6YVchoYux0g+yEWtzDaHd9vXRO4
vJYl5JhHeGBVhqV9XGzjjnjWTIe4GowsBWjlIZs2at9dKGcJ9VphFGWtB4O3ge0bm3GiDrKFzPnQ
kgrNYG184crwEF7OKZBMe4DGoHelM+Jlf22vqTXqm/jZwEP6EcTG11GimZeI+VWgXF05bZBpZSl3
HmYATGO9uwNiY+BBFWzwN+qm8NfNdaJldruXipQiuyuZsw3qGFhuhY7MONyBUEKUcPvE8cILDXdc
iGchg+VGMO+TezDmqWsNAl14GsIfrZ5TBrhbBg==

`pragma protect key_keyowner="Xilinx", key_keyname="xilinxt_2019_02", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
EiwWGMqFmzs7O9FfN6KUyO8gnJhPZ72S4wNWFGaAmKQJYi/1/7BOMJsIpb0Id9Lw5aC2ZIsYqLXp
SLzBH0UL+MEsorffCC5hFaGtWfs4TVmBPR91xhbGa0mejeb7oHRSa8XuGPgYo9mOxCtM6/lIKn/G
JTQq0ebTBSFfMdSs9b5Aj6UkNs/3ORzP2g70JyJM1FJwvErIcvG7FxSGSq3EEbew+DObssA8xIot
FpNT7YxIdNNAHXm2713m2tFGtiPCgSQHSPh/45YVJVCNyHRMk6Cl2DKZK9Q8EtrjrfyR2urY4Eo0
smz2wlOqcOFJxfS1gXRQV2vVniTptiQS+LrjbA==

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VELOCE-RSA", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128)
`pragma protect key_block
Pqek8mVQedxdOjXww5mYIZWTjgc6SZv4NAfN29EsmS5BmXIBHhvnZ3Ip6cjRnGw346uIoZ0o3ZQZ
ksINxFC7Mx1P6lsgU4AwYsasUMUGz/80bgsxCxL8vXT3ucVG5wRd5U8NiIfgJNYQ1XbJ/pDXBTKe
Gr9YiJUp+1ZocNynZnY=

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VERIF-SIM-RSA-2", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
D8mUUeBbmy1R9Naj1Iuc9rB1CppnVW3rK4V72bUsvWThTUcXHzuOb0va+UT3jEIIwcYgpTIgzvuf
GNYs/aKSaZR4KaaYY4+sGyrKP0FrKlImrAOzF9B8Y/GtKkqMWS38rK2UH1CkLfJQPuTVYMb+qwVU
xEPvXpS61rwtzu3T1Du9v2knBOcGsNfB3MGsgzqMSn1X1boQnW9oSvBiHe5oLk8wXk1z8vlnFXCS
ht0wqVSzu6q/n6y6xq0OtO9rJ6qeRYboRHhoZEQHDJlM8jMbw6MHsS3MjbOeQKQtkzhcD/CkryoO
CQyX/OXKXD5xV0B9k1PN6I/DqyHFSRsHIgZJ+Q==

`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-PREC-RSA", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
Je8xDqB+SAC0BwJbkbrZYh6N7wLQvg94ZOI+3bBIqJfrO546S5To4H2aBQTOXq84hTgofQ6RBSBX
zgX4suBVNn7tLeaaYN8wBo0wkhvX9iCXvMWAxSEsqdVivqHKSjkY3IAWG41aVDcjgFUDtkmhbAOX
5JGWzd4W3mVERhYkLFdg5s0Qzmob5yD/v1RG+yArJhzlD55XWcdLZVeqcg8zKaUU4fR+k7lGdpW3
ZFt7BVvGRmUIoxbDltJMlt8cz299kXHUGzQ6erOqpofRIYKGaJNLqP/pNWY0eJgK6DXj3h3KGrh3
Fl8TlfmzYfokl1NlvZoZWJ0CpMGe1xVT++8Sow==

`pragma protect key_keyowner="Synplicity", key_keyname="SYNP15_1", key_method="rsa"
`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256)
`pragma protect key_block
DFPdjbGrog0/ab1GnOEzNjGilvh4h66C7IXEIQKL7XyPFf+/lBJ0vSdc3WXSFUqg97ccKJ1cqiE0
O5EEn8O/8F/MIXJ1n0kd/PRvLddyRPKY8p6vMeDH/LcN2tfxYYSNOJRD7DrtFeRMVvSnnII4MTMN
cAUKDS6MQEA8x5aCtZ24wMQYmQhg0eeQf6EVwTt629Epgkkr9gxH+XKrXHnADSbkyFaUpkI0cXND
NHMhFO6nHjETla7QyqOii3rTKW57EQWzdY4j3OBYNQ8YSHQTjjyubjz9CXeTV2r3RGXUvJU6CbRF
LwEeLLjDh0eezDxbtrXTKhu3LC3EaD0ae/vY7g==

`pragma protect data_method = "AES128-CBC"
`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 282672)
`pragma protect data_block
[encoded data, 376884 characters]
ZrepbGCwy064
`pragma protect end_protected
`ifndef GLBL
`define GLBL
`timescale  1 ps / 1 ps

module glbl ();

    parameter ROC_WIDTH = 100000;
    parameter TOC_WIDTH = 0;

//--------   STARTUP Globals --------------
    wire GSR;
    wire GTS;
    wire GWE;
    wire PRLD;
    tri1 p_up_tmp;
    tri (weak1, strong0) PLL_LOCKG = p_up_tmp;

    wire PROGB_GLBL;
    wire CCLKO_GLBL;
    wire FCSBO_GLBL;
    wire [3:0] DO_GLBL;
    wire [3:0] DI_GLBL;
   
    reg GSR_int;
    reg GTS_int;
    reg PRLD_int;

//--------   JTAG Globals --------------
    wire JTAG_TDO_GLBL;
    wire JTAG_TCK_GLBL;
    wire JTAG_TDI_GLBL;
    wire JTAG_TMS_GLBL;
    wire JTAG_TRST_GLBL;

    reg JTAG_CAPTURE_GLBL;
    reg JTAG_RESET_GLBL;
    reg JTAG_SHIFT_GLBL;
    reg JTAG_UPDATE_GLBL;
    reg JTAG_RUNTEST_GLBL;

    reg JTAG_SEL1_GLBL = 0;
    reg JTAG_SEL2_GLBL = 0 ;
    reg JTAG_SEL3_GLBL = 0;
    reg JTAG_SEL4_GLBL = 0;

    reg JTAG_USER_TDO1_GLBL = 1'bz;
    reg JTAG_USER_TDO2_GLBL = 1'bz;
    reg JTAG_USER_TDO3_GLBL = 1'bz;
    reg JTAG_USER_TDO4_GLBL = 1'bz;

    assign (strong1, weak0) GSR = GSR_int;
    assign (strong1, weak0) GTS = GTS_int;
    assign (weak1, weak0) PRLD = PRLD_int;

    initial begin
	GSR_int = 1'b1;
	PRLD_int = 1'b1;
	#(ROC_WIDTH)
	GSR_int = 1'b0;
	PRLD_int = 1'b0;
    end

    initial begin
	GTS_int = 1'b1;
	#(TOC_WIDTH)
	GTS_int = 1'b0;
    end

endmodule
`endif
